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FEATURES Replaces Hybrid Amplifiers in Many Applications AC PERFORMANCE: Settles to 0.01% in 350 ns 100 V/ s Slew Rate 12.8 MHz min Unity-Gain Bandwidth 1.75 MHz Full-Power Bandwidth at 20 V p-p DC PERFORMANCE: 0.25 mV max Input Offset Voltage 5 V/ C max Offset Voltage Drift 0.5 nA Input Bias Current 250 V/mV min Open-Loop Gain 4 V p-p max Voltage Noise, 0.1 Hz to 10 Hz 94 dB min CMRR Available in Plastic Mini-DIP, Hermetic Cerdip and SOIC Packages. Also Available in Tape and Reel in Accordance with EIA-481A Standard
Precision, 16 MHz CBFET Op Amp AD845
CONNECTION DIAGRAMS Plastic Mini-DIP (N) Package and Cerdip (Q) Package 16-Pin SOIC (R-16) Package
PRODUCT DESCRIPTION
The AD845 is a fast, precise, N channel JFET input, monolithic operational amplifier. It is fabricated using Analog Devices' complementary bipolar (CB) process. Advanced laser-wafer trimming technology enables the very low input offset voltage and offset voltage drift performance to be realized. This precision, when coupled with a slew rate of 100 V/s, a stable unity-gain bandwidth of 16 MHz, and a settling time of 350 ns 0.01%--while driving a parallel load of 100 pF and 500 -- represents a combination of features unmatched by any FET input IC amplifier. The AD845 can easily be used to upgrade many existing designs which use BiFET or FET input hybrid amplifiers and, in some cases, those which use bipolar input op amps. The AD845 is ideal for use in applications such as active filters, high speed integrators, photo diode preamps, sample-and-hold amplifiers, log amplifiers, and in buffering A/D and D/A converters. The 250 V max input offset voltage makes offset nulling unnecessary in many applications. The common-mode rejection ratio of 110 dB over a 10 V input voltage range represents exceptional performance for a JFET input high speed op amp. This, together with a minimum open-loop gain of 250 V/mV ensures that 12-bit performance is achieved, even in unity-gain buffer circuits.
The AD845 conforms to the standard op amp pinout except that offset nulling is to V+. The AD845J and AD845K grade devices are available specified to operate over the commercial 0C to +70C temperature range. AD845A and AD845B devices are specified for operation over the -40C to +85C industrial temperature range. The AD845S is specified to operate over the full military temperature range of -55C to +125C. Both the industrial and military versions are available in 8-pin cerdip packages. The commercial version is available in an 8-pin plastic mini-DIP and 16-pin SOIC; "J" and "S" grade chips are also available.
PRODUCT HIGHLIGHTS
1. The high slew rate, fast settling time, and dc precision of the AD845 make it ideal for high speed applications requiring 12-bit accuracy. 2. The performance of circuits using the LF400, HA2520/2/5, HA2620/2/5, 3550, OPA605, and LH0062 can be upgraded in most cases. 3. The AD845 is unity-gain stable and internally compensated. 4. The AD845 is specified while driving 100 pF/500 loads.
REV. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 617/329-4700 Fax: 617/326-8703
AD845-SPECIFICATIONS (@ +25 C and
Model Conditions INPUT OFFSET VOLTAGE Initial Offset Offset Drift INPUT BIAS CURRENT2 Initial INPUT OFFSET CURRENT Initial INPUT CHARACTERISTICS Input Resistance Input Capacitance INPUT VOLTAGE RANGE Differential Common Mode Common-Mode Rejection INPUT VOLTAGE NOISE VCM = 0 V TMIN-TMAX VCM = 0 V TMIN-TMAX 0.75
1
15 V dc, unless otherwise noted)
Max 1.5 2.5 20 2 45/75 300 3/6.5 Min AD845K/B Typ Max 0.1 1.5 0.5 0.25 0.4 5.0 1 18/38 100 1.2/2.6 Min AD845S Typ 0.25 Max 1.0 2.0 10 2 500 300 20 Units mV mV V/C nA nA pA nA k pF V V dB V p-p nV/Hz nV/Hz nV/Hz nV/Hz nV/Hz pA/Hz V/mV V/mV V/mV V mA MHz MHz ns % V/s
Min
AD845J/A Typ 0.7
TMIN-TMAX
0.75
25
15
25
1011 4.0 20 +10.5/-13 110 4 80 60 25 18 12 0.1 200 100 70 12.5 50 5 12.8 16 1.75 20 20 100 13.6 500 250 250 125 75 12.5
1011 4.0 20 +10.5/-13 113 4 80 60 25 18 12 0.1 500 250 200 100 50 12.5 50 5 16 1.75 20 20 100 13.6
1011 4.0 20 +10.5/-13 110 4 80 60 25 18 12 0.1 500 250
VCM = 10 V 0.1 Hz to 10 Hz f = 10 Hz f = 100 Hz f = 1 kHz f = 10 kHz f = 100 kHz f = 1 kHz VO = 10 V RLOAD 2 k RLOAD 500 TMIN-TMAX
10 86
10 94
10 86
INPUT CURRENT NOISE OPEN-LOOP GAIN
OUTPUT CHARACTERISTICS Voltage RLOAD 500 Current Short Circuit Output Resistance Open Loop FREQUENCY RESPONSE Small Signal Full Power Bandwidth3 Rise Time Overshoot Slew Rate Settling Time Unity Gain VO = 10 V RLOAD = 500
50 5 16 1.75 20 20 100
80 10 V Step CLOAD = 100 pF RLOAD = 500 to 0.01% to 0.1% f = 4.4 MHz f = 4.4 MHz
94
94
350 250 0.04 0.02 15
350 250 0.04 0.02 15 18 4.75 95
500
350 250 0.04 0.02 15 4.75 88 110 10
500
ns ns % Degree V V dB mA
DIFFERENTIAL GAIN DIFFERENTIAL PHASE POWER SUPPLY Rated Performance Operating Range Rejection Ratio Quiescent Current
4.75 VS = 5 to 15 V 88 TMIN to TMAX
18 113 10 12
18 12
110 10
12
NOTES 1 Input offset voltage specifications are guaranteed after 5 minutes of operation at T A = +25C. 2 Bias current specifications are guaranteed maximum at either input after 5 minutes of operation at T A = +25C. 3 FPBW = slew rate/2 V peak. 4 "S" grade TMIN-TMAX are tested with automatic test equipment at T A = -55C and TA = +125C. All min and max specifications are guaranteed. Specifications shown in boldface are tested on all production units at final electrical test. Results from these tests are used to calculate outgoing quality levels. Specifications subject to change without notice.
-2-
REV. D
AD845
ABSOLUTE MAXIMUM RATINGS 1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Plastic Mini-DIP . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6 Watts Cerdip . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 Watts 16-Pin SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 Watts Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . + VS Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite Differential Input Voltage . . . . . . . . . . . . . . . . . . +VS and -VS Storage Temperature Range Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C N, R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65C to +125C Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300C
NOTES 1 Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only, and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability . 2 Mini-DIP package: JA = 100C/watt; cerdip package: JA = 110C/watt. SOIC package: JA = 100C/W.
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm). Contact factory for latest dimensions.
SUBSTRATE CONNECTED TO +VS
ORDERING GUIDE Model Temperature Range Package Description Package Option*
AD845JN AD845KN AD845JR-16 AD845AQ AD845BQ AD845SQ AD845SQ/883B 5962-8964501PA AD845JCHIPS AD845SCHIPS AD845JR-16-REEL AD845JR-16-REEL7
0C to +70C 0C to +70C 0C to +70C -40C to +85C -40C to +85C -55C to +125C -55C to +125C -55C to +125C 0C to +70C -55C to +125C 0C to +70C 0C to +70C
8-Pin Plastic Mini-DIP 8-Pin Plastic Mini-DIP 16-Pin SOIC 8-Pin Cerdip 8-Pin Cerdip 8-Pin Cerdip 8-Pin Cerdip 8-Pin Cerdip Die Die Tape & Reel Tape & Reel
N-8 N-8 R-16 Q-8 Q-8 Q-8 Q-8 Q-8
REV. D
-3-
AD845-Typical Characteristics
*N = Plastic DIP: Q = Cerdip; R = Small Outline IC (SOIC).
Common-Mode Voltage
Limit vs. Temperature
Figure 1. Input Voltage Swing vs. Supply Voltage
Figure 2. Output Voltage Swing vs. Supply Voltage
Figure 3. Output Voltage Swing vs. Resistive Load
Figure 4. Quiescent Current vs. Supply Voltage
Figure 5. Input Bias Current vs. Temperature
Figure 6. Magnitude of Output Impedance vs. Frequency
Figure 7. Input Bias Current vs.
Figure 8. Short-Circuit Current
Figure 9. Unity-Gain Bandwidth
-4-
REV. D
AD845
vs. Temperature vs. Frequency Spectral Density
Figure 10. Open-Loop Gain and Phase Margin vs. Frequency
Figure 11. Open-Loop Gain vs. Supply Voltage
Figure 12. Power Supply Rejection vs. Frequency
Figure 13. Common-Mode Rejection vs. Frequency
Figure 14. Large Signal Frequency Response
Figure 15. Output Swing and Error vs. Settling Time
Figure 16. Harmonic Distortion
Figure 17. Input Noise Voltage
Figure 18. Slew Rate vs. Temperature
REV. D
-5-
AD845
Figure 19. Recommended Power Supply Bypassing
Figure 20. AD845 Simplified Schematic
Figure 21. Offset Null Configuration
Figure 22a. Unity-Gain Follower
Figure 22b. Unity-Gain Follower Large Signal Pulse Response
Figure 22c. Unity-Gain Follower Small Signal Pulse Response
Figure 23a. Unity-Gain Inverter
Figure 23b. Unity-Gain Inverter Large Signal Pulse Response
Figure 23c. Unity-Gain Inverter Small Signal Pulse Response
-6-
REV. D
AD845
MEASURING AD845 SETTLING TIME
The Figure 24 shows the AD845 settling time performance. This measurement was accomplished by driving the amplifier in the unity-gain inverting mode with a fast pulse generator. The input summing junction was measured using false nulling techniques. Settling time is defined as: The interval of time from the application of an ideal step function input until the closed-loop amplifier output has entered and remains within a specified error band. Components of settling time include: 1. Propagation time through the amplifier 2. Slewing time to approach the final output value 3. Recovery time from overload associated with the slewing 4. Linear settling to within a specified error band. These individual components can easily be seen in Figure 24. Settling time is extremely important in high speed applications where the current output of a DAC must be converted to a voltage. When driving a 500 load in parallel with a 100 pF capacitor, the AD845 settles to 0.1% in 250 ns and to 0.01% in 310 ns.
and stable, accurately defined gain. Low input bias currents and fast settling are achieved with the FET input AD845. Most monolithic instrumentation amplifiers do not have the high frequency performance of the circuit in Figure 26. The circuit bandwidth is 10.9 MHz at a gain of 1 and 8.8 MHz at a gain of 10; settling time for the entire circuit is 900 ns to 0.01% for a 10 V step (Gain = 10). The capacitors employed in this circuit greatly improve the amplifier's settling time and phase margin.
Figure 26. High Performance, High Speed Instrumentation Amplifier
Table I. Performance Summary for the Three Op Amp Instrumentation Amplifier Circuit 3 Op-Amp In-Amp Small Signal Bandwidth
Figure 24. Settling Characteristics 0 V to 10 V Step Upper Trace: Output of AD845 Under Test (5 V/Div) Lower Trace: Error Voltage (1 mV/Div)
Gain
RG
Settling Time to 0.01%
1 2 10 100
Open 2k 226 20
10.9 MHz 8.8 MHz 2.6 MHz 290 kHz
500 ns 500 ns 900 ns 7.5 s
Note: Resistors around the amplifiers' input pins need to be small enough in value so that the RC time constant they form, with stray circuit capacitance, does not reduce circuit bandwidth.
Figure 25. Settling Time Test Circuit
A HIGH SPEED INSTRUMENTATION AMP
The three op amp instrumentation amplifier circuit shown in Figure 26 can provide a range of gains from unity up to 1000 and higher. The instrumentation amplifier configuration features high common-mode rejection, balanced differential inputs REV. D -7-
Figure 27. The Pulse Response of the Three Op Amp Instrumentation Amplifier. Gain = 1, Horizontal Scale: 0.5 ms/Div; Vertical Scale: 5 V/Div
AD845
Figure 28a. Settling Time of the Three Op Amp Instrumentation Amplifier. Horizontal Scale: 200 ns/Div; Vertical Scale, Positive Pulse Input: 5 V/Div; Output Settling: 1 mV/Div
DRIVING THE ANALOG INPUT OF AN A/D CONVERTER
Figure 28b. Settling Time of the Three Op Amp Instrumentation Amplifier. Horizontal Scale: 200 ns/Div; Vertical Scale, Negative Pulse Input: 5 V/ Div; Output Settling: 1 mV/Div
An op amp driving the analog input of an A/D converter, such as that shown in Figure 29, must be capable of maintaining a constant output voltage under dynamically changing load conditions. In successive approximation converters, the input current is compared to a series of switched trial currents. The comparison point is diode clamped but may deviate several hundred millivolts resulting in high frequency modulation of A/D input current. The output impedance of a feedback amplifier is made artificially low by the loop gain. At high frequencies, where the loop gain is low, the amplifier output impedance can approach its open-loop value. Most IC amplifiers exhibit a minimum open-loop output impedance of 25 due to current limiting resistors. A few hundred microamps reflected from the change in converter loading can introduce errors in instantaneous input voltage. If the A/D conversion speed is not excessive and the bandwidth of the amplifier is sufficient, the amplifier's output will return to the nominal value before the converter makes its comparison. However, many amplifiers have relatively narrow bandwidth yielding slow recovery from output transients. The
AD845 is ideally suited to drive high resolution A/D converters with 5 s on longer conversion times since it offers both wide bandwidth and high open-loop gain.
Figure 29. AD845 As ADC Unity Gain Buffer
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Mini-DIP (N) Package
Cerdip (Q) Package
PRINTED IN U.S.A.
-8-
REV. D
C1188c-5-8/94


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